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octal dtype latch with 3state outputs the mc74ac564/74act564 is a high-speed, low power octal flip-flop with a buffered common clock (cp) and a buffered common output enable (oe ). the information presented to the d inputs is stored in the flip-flops on the low-to-high clock (cp) transition. the mc74ac564/74act564 device is functionally identical to the mc74ac574/74act574, but with inverted outputs. ? inputs and outputs on opposite sides of package allowing easy interface with microprocessors ? useful as input or output port for microprocessors ? functionally identical to mc74ac574/74act574 but with inverted outputs ? 3-state outputs for bus-oriented applications ? outputs source/sink 24 ma ? act564 has ttl compatible inputs 19 20 18 17 16 15 14 2 1 34567 v cc 13 8 12 9 11 10 o 0 o 1 o 2 o 3 o 4 o 5 o 6 o 7 cp oe d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 gnd figure 1. pinout: 20lead packages conductors (top view) pin names d 0 d 7 data inputs cp clock pulse input oe 3-state output enable input o 0 o 7 3-state outputs ? semiconductor components industries, llc, 2001 february, 2001 rev. 4 1 publication order number: mc74ac564/d mc74ac564 mc74act564 octal d-type latch with 3-state outputs n suffix case 738-03 plastic dw suffix case 751d-04 plastic figure 2. logic symbol o 0 o 1 o 2 o 3 o 4 o 5 o 6 o 7 d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 cp oe
mc74ac564 mc74act564 http://onsemi.com 2 functional description the mc74ac564/74act564 consists of eight edge- triggered flip-flops with individual d-type inputs and 3-state complementary outputs. the buffered clock and buffered output enable are common to all flip-flops. the eight flip-flops will store the state of their individual d inputs that meet the setup and hold times requirements on the low-to-high clock (cp) transition. with the output enable (oe ) low, the contents of the eight flip-flops are available at the outputs. when oe is high, the outputs go to the high impedance state. operation of the oe input does not affect the state of the flip-flops. function table inputs internal outputs f nction oe cp d q o function h h l nc z hold h hh nc z hold h lh z load h hl z load l lh h data available l hl l data available l hl nc nc no change in data l h h nc nc no change in data h = high voltage level l = low voltage level x = immaterial z = high impedance = low-to-high transition nc = no change figure 3. logic diagram d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 cd q o 0 o 1 o 2 o 3 o 4 o 5 o 6 o 7 oe cp cd q cd q cd q cd q cd q cd q cd q please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
mc74ac564 mc74act564 http://onsemi.com 3 maximum ratings* symbol parameter value unit v cc dc supply voltage (referenced to gnd) 0.5 to +7.0 v v in dc input voltage (referenced to gnd) 0.5 to v cc +0.5 v v out dc output voltage (referenced to gnd) 0.5 to v cc +0.5 v i in dc input current, per pin 20 ma i out dc output sink/source current, per pin 50 ma i cc dc v cc or gnd current per output pin 50 ma t stg storage t emperature 65 to +150 c * maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the recommended operating conditions. recommended operating conditions symbol parameter min typ max unit v supply voltage ac 2.0 5.0 6.0 v v cc supply voltage act 4.5 5.0 5.5 v v in , v out dc input voltage, output voltage (ref. to gnd) 0 v cc v v cc @ 3.0 v 150 t r , t f input rise and fall time (note 1) ac devices exce p t schmitt in p uts v cc @ 4.5 v 40 ns/v r , f ac devices except schmitt inputs v cc @ 5.5 v 25 t t input rise and fall time (note 2) v cc @ 4.5 v 10 ns/v t r , t f in ut rise and fall time (note 2) act devices except schmitt inputs v cc @ 5.5 v 8.0 ns/v t j junction temperature (pdip) 140 c t a operating ambient temperature range 40 25 85 c i oh output current e high 24 ma i ol output current e low 24 ma 1. v in from 30% to 70% v cc ; see individual data sheets for devices that differ from the typical input rise and fall times. 2. v in from 0.8 v to 2.0 v; see individual data sheets for devices that differ from the typical input rise and fall times.
mc74ac564 mc74act564 http://onsemi.com 4 dc characteristics 74ac 74ac symbol parameter v cc (v) t a = +25 c t a = 40 c to +85 c unit conditions typ guaranteed limits v ih minimum high level 3.0 1.5 2.1 2.1 v out = 0.1 v g input v oltage 4.5 2.25 3.15 3.15 v or v cc 0.1 v 5.5 2.75 3.85 3.85 v il maximum low level 3.0 1.5 0.9 0.9 v out = 0.1 v input v oltage 4.5 2.25 1.35 1.35 v or v cc 0.1 v 5.5 2.75 1.65 1.65 v oh minimum high level 3.0 2.99 2.9 2.9 i out = 50 m a g output voltage 4.5 4.49 4.4 4.4 v 5.5 5.49 5.4 5.4 *v in = v il or v ih 3.0 2.56 2.46 v 12 ma 4.5 3.86 3.76 v i oh 24 ma 5.5 4.86 4.76 24 ma v ol maximum low level 3.0 0.002 0.1 0.1 i out = 50 m a output voltage 4.5 0.001 0.1 0.1 v 5.5 0.001 0.1 0.1 *v in = v il or v ih 3.0 0.36 0.44 v 12 ma 4.5 0.36 0.44 v i ol 24 ma 5.5 0.36 0.44 24 ma i in maximum input 55 01 10 m a v i =v cc gnd leakage current 5.5 0 . 1 1 . 0 m a v i = v cc , gnd i oz maximum v i (oe) = v il , v ih 3-state c 5.5 0.5 5.0 m a v i = v cc , gnd current v o = v cc , gnd i old 2minimum dynamic ot tc t 5.5 75 ma v old = 1.65 v max i ohd output current 5.5 75 ma v ohd = 3.85 v min i cc maximum quiescent 55 80 80 m a v in =v cc or gnd q supply current 5.5 8 . 0 80 m a v in = v cc or gnd * all outputs loaded; thresholds on input associated with output under test. 2 maximum test duration 2.0 ms, one output loaded at a time. note: i in and i cc @ 3.0 v are guaranteed to be less than or equal to the respective limit @ 5.5 v v cc .
mc74ac564 mc74act564 http://onsemi.com 5 ac characteristics (for figures and waveforms e see section 3 of the on semiconductor fact data book, dl138/d) 74ac 74ac symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. min typ max min max f maximum clock 3.3 75 60 mhz 3-3 f max frequency 5.0 95 85 mh z 3 - 3 t plh propagation delay 3.3 3.5 14.0 3.5 15.5 ns 3-6 t plh cp to o n 5.0 2.0 10.5 2.0 11.5 ns 3 - 6 t phl propagation delay 3.3 3.5 12.5 3.5 14.0 ns 3-6 t phl cp to o n 5.0 2.0 9.5 2.0 10.5 ns 3 - 6 t pzh out p ut enable time 3.3 2.5 11.5 2.5 12.5 ns 3-7 t pzh o utput e na bl e ti me 5.0 2.0 9.0 2.0 9.5 ns 3 -7 t pzl out p ut enable time 3.3 3.0 11.0 3.5 12.0 ns 3-8 t pzl o utput e na bl e ti me 5.0 1.5 8.5 2.0 9.5 ns 3 - 8 t phz out p ut disable time 3.3 4.0 12.5 4.5 13.5 ns 3-7 t phz o utput di sa bl e ti me 5.0 2.0 10.5 2.0 11.5 ns 3 -7 t plz out p ut disable time 3.3 2.0 9.5 2.5 10.5 ns 3-8 t plz o utput di sa bl e ti me 5.0 1.5 8.0 1.5 9.0 ns 3 - 8 * voltage range 3.3 v is 3.3 v 0.3 v. voltage range 5.0 v is 5.0 v 0.5 v. ac operating requirements 74ac 74ac symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. typ guaranteed minimum t setup time, high or low 3.3 2.5 3.0 ns 3-9 t s d n to cp 5.0 2.0 2.5 ns 3 - 9 t h hold time, high or low 3.3 2.0 2.0 ns 3-9 t h d n to cp 5.0 2.0 2.0 ns 3 - 9 t cp pulse width 3.3 6.0 7.0 ns 3-6 t w high or low 5.0 4.0 5.0 ns 3 - 6 * voltage range 3.3 v is 3.3 v 0.3 v. voltage range 5.0 v is 5.0 v 0.5 v.
mc74ac564 mc74act564 http://onsemi.com 6 dc characteristics 74act 74act symbol parameter v cc (v) t a = +25 c t a = 40 c to +85 c unit conditions typ guaranteed limits v ih minimum high level 4.5 1.5 2.0 2.0 v v out = 0.1 v g input v oltage 5.5 1.5 2.0 2.0 v or v cc 0.1 v v il maximum low level 4.5 1.5 0.8 0.8 v v out = 0.1 v input v oltage 5.5 1.5 0.8 0.8 v or v cc 0.1 v v oh minimum high level 4.5 4.49 4.4 4.4 v i out = 50 m a g output voltage 5.5 5.49 5.4 5.4 v *v in = v il or v ih 4.5 3.86 3.76 v i oh 24 ma 5.5 4.86 4.76 i oh 24 ma v ol maximum low level 4.5 0.001 0.1 0.1 v i out = 50 m a output voltage 5.5 0.001 0.1 0.1 v *v in = v il or v ih 4.5 0.36 0.44 v i ol 24 ma 5.5 0.36 0.44 i ol 24 ma i in maximum input 55 01 10 m a v i =v cc gnd leakage current 5.5 0 . 1 1 . 0 m a v i = v cc , gnd d i cct additional max. i cc /input 5.5 0.6 1.5 ma v i = v cc 2.1 v i oz maximum v i (oe) = v il , v ih 3-state c 5.5 0.5 5.0 m a v i = v cc , gnd current v o = v cc , gnd i old 2minimum dynamic ot tc t 5.5 75 ma v old = 1.65 v max i ohd output current 5.5 75 ma v ohd = 3.85 v min i cc maximum quiescent 55 80 80 m a v in =v cc or gnd q supply current 5.5 8 . 0 80 m a v in = v cc or gnd * all outputs loaded; thresholds on input associated with output under test. 2 maximum test duration 2.0 ms, one output loaded at a time. ac characteristics (for figures and waveforms e see section 3 of the on semiconductor fact data book, dl138/d) 74act 74act symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. min typ max min max f maximum clock 50 85 75 mhz 3-3 f max maximum clock frequency 5. 0 8 5 75 mh z 3 - 3 t plh propagation delay 50 20 10 5 15 11 5 ns 3-6 t plh pro agation delay cp to o n 5. 0 2 . 0 10 .5 1 .5 11 .5 ns 3 - 6 t phl propagation delay 50 15 95 15 10 5 ns 3-6 t phl pro agation delay cp to o n 5. 0 1 .5 9 .5 1 .5 10 .5 ns 3 - 6 t pzh output enable time 5.0 1.5 9.0 1.5 9.5 ns 3-7 t pzl output enable time 5.0 1.5 8.5 1.0 9.5 ns 3-8 t phz output disable time 5.0 1.5 10.5 1.5 11.5 ns 3-7 t plz output disable time 5.0 1.5 8.0 1.0 8.5 ns 3-8 * voltage range 5.0 v is 5.0 v 0.5 v.
mc74ac564 mc74act564 http://onsemi.com 7 ac operating requirements 74act 74act symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. typ guaranteed minimum t setup time, high or low 50 25 30 ns 3-9 t s setu time, high or low d n to cp 5. 0 2 .5 3 . 0 ns 3 - 9 t h hold time, high or low 50 10 10 ns 3-9 t h hold time, high or low d n to cp 5. 0 1 . 0 1 . 0 ns 3 - 9 t le pulse width 50 30 35 ns 3-6 t w le pulse width high or low 5. 0 3 . 0 3 .5 ns 3 - 6 * voltage range 3.3 v is 3.3 v 0.3 v. * voltage range 5.0 v is 5.0 v 0.5 v. capacitance symbol parameter value typ unit test conditions c in input capacitance 4.5 pf v cc = 5.0 v c pd power dissipation capacitance 50 pf v cc = 5.0 v
mc74ac564 mc74act564 http://onsemi.com 8 outline dimensions n suffix plastic dip package case 73803 issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimension b does not include mold flash. m l j 20 pl m b m 0.25 (0.010) t dim min max min max millimeters inches a 25.66 27.17 1.010 1.070 b 6.10 6.60 0.240 0.260 c 3.81 4.57 0.150 0.180 d 0.39 0.55 0.015 0.022 g 2.54 bsc 0.100 bsc j 0.21 0.38 0.008 0.015 k 2.80 3.55 0.110 0.140 l 7.62 bsc 0.300 bsc m 0 15 0 15 n 0.51 1.01 0.020 0.040 e 1.27 1.77 0.050 0.070 1 11 10 20 a seating plane k n f g d 20 pl t m a m 0.25 (0.010) t e b c f 1.27 bsc 0.050 bsc
mc74ac564 mc74act564 http://onsemi.com 9 outline dimensions dw suffix plastic soic package case 751d04 issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.150 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.13 (0.005) total in excess of d dimension at maximum material condition. a b 20 1 11 10 s a m 0.010 (0.25) b s t d 20x m b m 0.010 (0.25) p 10x j f g 18x k c t seating plane m r x 45 dim min max min max inches millimeters a 12.65 12.95 0.499 0.510 b 7.40 7.60 0.292 0.299 c 2.35 2.65 0.093 0.104 d 0.35 0.49 0.014 0.019 f 0.50 0.90 0.020 0.035 g 1.27 bsc 0.050 bsc j 0.25 0.32 0.010 0.012 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 10.05 10.55 0.395 0.415 r 0.25 0.75 0.010 0.029
mc74ac564 mc74act564 http://onsemi.com 10 notes
mc74ac564 mc74act564 http://onsemi.com 11 notes
mc74ac564 mc74act564 http://onsemi.com 12 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into t he body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc74ac564/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland

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